The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2007

Filed:

Jun. 08, 2004
Applicants:

Chih-hsiang Chen, Portland, OR (US);

Guo-qiang Lo, Portland, OR (US);

Inventors:

Chih-Hsiang Chen, Portland, OR (US);

Guo-Qiang Lo, Portland, OR (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates to a shallow trench isolation structure and a method for forming a shallow trench isolation structure on a semiconductor substrate. A masking structure that includes a hard mask is formed over the semiconductor substrate and an etch is performed so as to form trenches within the semiconductor substrate. A shallow trench isolation structure and a method for forming a shallow trench isolation structure are disclosed. Oxidation enhancing species are then implanted into the bottom surface of the trenches and an oxidation process is performed. The oxidation enhancing species will form a deep oxidation region below the bottom surface of each trench and will form thinner oxidation regions within side surfaces of trenches. A layer of dielectric material is then deposited to fill the trenches. A chemical mechanical polishing process is performed to remove those portions of the dielectric film that overlie the hard mask. The hard mask is then removed, producing a void-free shallow trench isolation structure.


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