The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2007
Filed:
Apr. 01, 2004
Chih Chieh Yeh, Taipei, TW;
Wen Jer Tsai, Hualian, TW;
Tao Cheng LU, Kaohsiung, TW;
Chih Yuan LU, Hsinchu, TW;
Chih Chieh Yeh, Taipei, TW;
Wen Jer Tsai, Hualian, TW;
Tao Cheng Lu, Kaohsiung, TW;
Chih Yuan Lu, Hsinchu, TW;
Macronix International Co., Ltd., Hsinchu, TW;
Abstract
A memory architecture for an integrated circuit comprises a first memory array configured to store data for one pattern of data usage and a second memory array configured to store data for another pattern of data usage. The first and second memory arrays comprise charge storage based nonvolatile memory cells having substantially the same structure in both arrays. A first operation algorithm adapted for example for data flash applications is used for programming, erasing and reading data in the first memory array. A second operation algorithm adapted for example for code flash applications is used for programming, erasing and reading data in the second memory array, wherein the second operation algorithm is different than the first operation algorithm. Thus, one die with memory for both code flash and data flash applications can be easily manufactured using a simple process, at low cost and high yield.