The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2007

Filed:

Jul. 23, 2002
Applicants:

Shigenobu Maeda, Tokyo, JP;

Hiroyuki Takashiho, Tokyo, JP;

Toshihide Oka, Tokyo, JP;

Inventors:

Shigenobu Maeda, Tokyo, JP;

Hiroyuki Takashiho, Tokyo, JP;

Toshihide Oka, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
Abstract

It is an object to obtain a semiconductor device having such a structure that respective electrical characteristics of an insulated gate type transistor and an insulated gate type capacitance are not deteriorated and a method of manufacturing the semiconductor device. An NMOS transistor Qand a PMOS transistor Qwhich are formed in an NMOS formation region Aand a PMOS formation region Arespectively have Ppocket regionsand Npocket regionsin vicinal regions of extension portionsandof Nsource-drain regionsand Psource-drain regions, respectively. On the other hand, an N-type variable capacitance Cand a P-type variable capacitance Cwhich are formed in an N-type variable capacitance formation region Aand a P-type variable capacitance formation region Arespectively do not have a region of a reverse conductivity type which is adjacent to extraction electrode regions corresponding to the Ppocket regionsand the Npocket regions


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