The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2006
Filed:
Jan. 26, 2005
Shih-chang Liu, Yong Kang, TW;
Wen-ting Chu, Kaohsiung County, TW;
Chien-ming Ku, Hsinchu, TW;
Chi-hsin Lo, Jhubei, TW;
Chia-shiung Tsai, Hsin-chu, TW;
Chia-ta Hsieh, Tainan, TW;
Shih-Chang Liu, Yong Kang, TW;
Wen-Ting Chu, Kaohsiung County, TW;
Chien-Ming Ku, Hsinchu, TW;
Chi-Hsin Lo, Jhubei, TW;
Chia-Shiung Tsai, Hsin-chu, TW;
Chia-Ta Hsieh, Tainan, TW;
Abstract
A method is provided for fabrication of a semiconductor substrate having regions isolated from each other by shallow trench isolation (STI) structures protruding above a surface of the substrate by a step height. The method includes the steps of forming a bottom antireflective coating (BARC) layer overlying the surface of a semiconductor substrate and the surface of STI structures; etching back a portion of the BARC layer overlying at least one of the STI structures, and partially etching back the at least one of the STI structures, to reduce the step height by which the STI structure protrudes above the surface of the substrate; and removing a remaining portion of the BARC layer between adjacent STI structures. The method may be used to fabricate semiconductor devices including memory cells that have improved reliability.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile