The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2006

Filed:

Apr. 22, 2003
Applicants:

Peter L. Kellerman, Essex, MA (US);

Victor Benveniste, Gloucester, MA (US);

Michel Pharand, Chelmsford, MA (US);

Dale K. Stone, Lynnfield, MA (US);

Inventors:

Peter L. Kellerman, Essex, MA (US);

Victor Benveniste, Gloucester, MA (US);

Michel Pharand, Chelmsford, MA (US);

Dale K. Stone, Lynnfield, MA (US);

Assignee:

Axcelis Technologies, Inc., Beverly, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02N 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electrostatic clamp for securing a semiconductor wafer during processing. The electrostatic clamp includes a base member, a first dielectric layer, a second dielectric layer having a gas pressure distribution micro-groove network formed therein, a gas gap positioned between a backside of a semiconductor wafer and the second dielectric layer, and a pair of high voltage electrodes positioned between the first dielectric layer and the second dielectric layer.


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