The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2006
Filed:
Aug. 13, 2001
Scott Brad Herner, Palo Alto, CA (US);
Michael A. Vyvoda, Fremont, CA (US);
Scott Brad Herner, Palo Alto, CA (US);
Michael A. Vyvoda, Fremont, CA (US);
SanDisk 3D LLC, Sunnyvale, CA (US);
Abstract
Low resistivity, C54-phase TiSiis formed in narrow lines on heavily doped polysilicon by depositing a bi-layer silicon film. A thin, undoped amorphous layer is deposited on top of a heavily doped layer. The thickness of the undoped amorphous Si is about 2.4 times the thickness of the subsequently deposited Ti film. Upon thermal annealing above 750° C., the undoped amorphous Si is consumed by the reaction of Ti+Si to form TiSi, forming a low-resistivity, C54-phase TiSifilm on top of heavily doped polysilicon. The annealing temperature required to form C54 phase TiSiis reduced by consuming undoped amorphous Si in the reaction of Ti and Si, as compared with heavily doped polysilicon. Narrow lines (<0.3 μm) of low-resistivity, C54-phase TiSifilms on heavily doped polysilicon are thus achieved.