The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2006

Filed:

Nov. 01, 2004
Applicants:

Srikanteswara Dakshina-murthy, Wappingers Falls, NY (US);

Douglas Bonser, Hopewell Junction, NY (US);

Mark C. Kelling, Marlboro, NY (US);

Asuka Nomura, Poughkeepsie, NY (US);

Inventors:

Srikanteswara Dakshina-Murthy, Wappingers Falls, NY (US);

Douglas Bonser, Hopewell Junction, NY (US);

Mark C. Kelling, Marlboro, NY (US);

Asuka Nomura, Poughkeepsie, NY (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A strained silicon semiconductor arrangement with a shallow trench isolation (STI) structure has a strained silicon (Si) layer formed on a silicon germanium (SiGe) layer. A trench extends through the Si layer into the SiGe layer, and sidewall spacers are employed that cover the entirety of the sidewalls within the trench in the SiGe layer. Following STI fill, polish and nitride stripping process steps, further processing can be performed without concern of the SiGe layer being exposed to a silicide formation process.


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