The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2006

Filed:

Oct. 06, 2005
Applicants:

Tomoharu Tanaka, Yokohama, JP;

Masaki Momodomi, Yokohama, JP;

Hideo Kato, Kawasaki, JP;

Hiroto Nakai, Yokohama, JP;

Yoshiyuki Tanaka, Yokohama, JP;

Riichiro Shirota, Fujisawa, JP;

Seiichi Aritome, Kawasaki, JP;

Yasuo Itoh, Kawasaki, JP;

Yoshihisa Iwata, Yokohama, JP;

Hiroshi Nakamura, Kawasaki, JP;

Hideko Odaira, Machida, JP;

Yutaka Okamoto, Kawasaki, JP;

Masamichi Asano, Tokyo-To, JP;

Kaoru Tokushige, Yokohama, JP;

Inventors:

Tomoharu Tanaka, Yokohama, JP;

Masaki Momodomi, Yokohama, JP;

Hideo Kato, Kawasaki, JP;

Hiroto Nakai, Yokohama, JP;

Yoshiyuki Tanaka, Yokohama, JP;

Riichiro Shirota, Fujisawa, JP;

Seiichi Aritome, Kawasaki, JP;

Yasuo Itoh, Kawasaki, JP;

Yoshihisa Iwata, Yokohama, JP;

Hiroshi Nakamura, Kawasaki, JP;

Hideko Odaira, Machida, JP;

Yutaka Okamoto, Kawasaki, JP;

Masamichi Asano, Tokyo-To, JP;

Kaoru Tokushige, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.


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