The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2006

Filed:

Dec. 14, 2004
Applicants:

Kangguo Cheng, Beacon, NY (US);

Ramachandra Divakaruni, Ossining, NY (US);

Kenneth T. Settlemyer, Jr., Poughquag, NY (US);

Inventors:

Kangguo Cheng, Beacon, NY (US);

Ramachandra Divakaruni, Ossining, NY (US);

Kenneth T. Settlemyer, Jr., Poughquag, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 21/3205 (2006.01); H01L 21/4763 (2006.01); H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

A field effect transistor formed by a sacrificial gate process has a simplified process and improved yield by using a tunable resistant anti-reflective coating (TERA) as the cap layer over the sacrificial gate layer. The TERA layer serves as a tunable anti-reflection layer for photolithography patterning, a hardmask for etching the sacrificial gate, a polish stopping layer for planarization, and a blocking layer for preventing silicide formation over the sacrificial gate. The TERA is stripped by a two-step process that is highly selective to the nitride spacers, so that the spacers are not damaged in the process of stripping the sacrificial gate.


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