The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2006
Filed:
Feb. 26, 2004
Toshiharu Furukawa, Essex Junction, VT (US);
Mark Charles Hakey, Fairfax, VT (US);
David Vaclav Horak, Essex Junction, VT (US);
Charles William Koburger, Iii, Delmar, NY (US);
Mark Eliot Masters, Essex Junction, VT (US);
Peter H. Mitchell, Jericho, VT (US);
Stanislav Polonsky, Putnam Valley, NY (US);
Toshiharu Furukawa, Essex Junction, VT (US);
Mark Charles Hakey, Fairfax, VT (US);
David Vaclav Horak, Essex Junction, VT (US);
Charles William Koburger, III, Delmar, NY (US);
Mark Eliot Masters, Essex Junction, VT (US);
Peter H. Mitchell, Jericho, VT (US);
Stanislav Polonsky, Putnam Valley, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal catalyst pad on a conductor at the via site, depositing and etching a dielectric layer to form a cavity, growing substantially parallel carbon nanotubes on the catalyst in the cavity, and filling the remaining voids in the cavity with copper. The next conductive layer is then formed over the via hole.