The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2006
Filed:
Aug. 02, 2004
PR Chidambaram, Richardson, TX (US);
Haowen Bu, Plano, TX (US);
PR Chidambaram, Richardson, TX (US);
Haowen Bu, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method () of forming a transistor includes forming a gate structure () over a semiconductor body and forming recesses () substantially aligned to the gate structure in the semiconductor body. Amorphous silicon regions are then formed () in the recesses. The amorphous silicon regions are re-crystallized. Sidewall spacers are formed () over lateral edges of the gate structure. The method continues by implanting source and drain regions in the semiconductor body () after forming the sidewall spacers. The re-crystallized silicon regions formed in the recesses reside close to the transistor channel and serve to facilitate improved carrier mobility in NMOS type transistor devices.