The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2006
Filed:
Jan. 14, 2003
Hidetoshi Kusano, Kanagawa, JP;
Shinji Kumon, Tokyo, JP;
Hidetoshi Kusano, Kanagawa, JP;
Shinji Kumon, Tokyo, JP;
Sony Corporation, Tokyo, JP;
Dai Nippon Insatsu Kabushiki Kaisha, Tokyo, JP;
Abstract
Metal foil is laminated via an insulating layer so as to cover the first layer circuit wiring formed on a conductive substrate, and a resist layer is formed so as to cover the second layer circuit wiring formed by pattern-etching the metal foil. Using the conductive substrate as a power feeding layer, a conductive material is filled, by electrolytic plating, in interlayer via holes each formed by applying a laser beam to the resist layer, thereby to establish interlayer connection between the first layer circuit wiring and the second layer circuit wiring. Subsequently, the resist layer is removed, and then, using the conductive substrate as a power feeding layer, a conductive material is filled, by electrolytic plating, in hole portions of an insulating layer formed so as to cover the second layer circuit wiring, thereby to form external connection terminals. Then, the conductive substrate is removed entirely or partly to expose the first layer circuit wiring, thereby to manufacture a flexible multilayer wiring board.