The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 2006
Filed:
Apr. 15, 2003
Applicants:
Shuji Kikuchi, Yokohama, JP;
Tadanobu Toba, Yokohama, JP;
Katsunori Hirano, Yokohama, JP;
Yuji Sonoda, Hiratsuka, JP;
Takeshi Wada, Akishima, JP;
Inventors:
Shuji Kikuchi, Yokohama, JP;
Tadanobu Toba, Yokohama, JP;
Katsunori Hirano, Yokohama, JP;
Yuji Sonoda, Hiratsuka, JP;
Takeshi Wada, Akishima, JP;
Assignee:
Renesas Technology Corp., Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A signature circuit, i.e., a random-number generating circuit, is provided in a memory test apparatus. Also, a signature circuit is provided in each of devices-under-test. This configuration allows the large number of semiconductor integrated-circuit devices to be tested at one time with a high efficiency. This condition realizes a tremendous reduction in the test cost.