The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 12, 2006
Filed:
Jan. 31, 2000
Gopal Hegde, San Jose, CA (US);
Surendra Rathaur, Milpitas, CA (US);
Miguel Guerrero, Union City, CA (US);
Anoop Hegde, Sunnyvale, CA (US);
Ilango Ganga, San Jose, CA (US);
Amamath Mutt, Sunnyvale, CA (US);
Simon Sabato, Sunnyvale, CA (US);
Gopal Hegde, San Jose, CA (US);
Surendra Rathaur, Milpitas, CA (US);
Miguel Guerrero, Union City, CA (US);
Anoop Hegde, Sunnyvale, CA (US);
Ilango Ganga, San Jose, CA (US);
Amamath Mutt, Sunnyvale, CA (US);
Simon Sabato, Sunnyvale, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method apparatus for hardware and software co-simulation in ASIC development includes developing hardware and software concurrently and co-simulating the hardware and software therebetween via a network while the hardware and software are being developed. The method and apparatus for hardware and software co-simulation allows the software development and testing of hardware and software to start with the design of hardware so as to reduce an overall system development cycle involving ASICs.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile