The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 12, 2006
Filed:
Oct. 28, 2004
Hao-yu Chen, Kaohsiung, TW;
Fu-liang Yang, Hsin-Chu, TW;
Hung-wei Chen, Hsinchu, TW;
Ping-kun Wu, Chang-Hua, TW;
Chao-hsiung Wang, Hsinchu, TW;
Hao-Yu Chen, Kaohsiung, TW;
Fu-Liang Yang, Hsin-Chu, TW;
Hung-Wei Chen, Hsinchu, TW;
Ping-Kun Wu, Chang-Hua, TW;
Chao-Hsiung Wang, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
This invention discloses a method and a semiconductor structure for integrating at least one bulk device and at least one silicon-on-insulator (SOI) device. The semiconductor structure includes a first substrate having an SOI area and a bulk area, on which the bulk device is formed; an insulation layer formed on the first substrate in the SOI area; and a second substrate, on which the SOI device is formed, stacked on the insulation layer. The surface of the first substrate is not on the substantially same plane as the surface of the second substrate.