The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2006
Filed:
Apr. 30, 2004
Jae-woo Kim, Sungnam-si, KR;
Yong-sun Ko, Suwon-si, KR;
Sang-sup Jeong, Suwon-si, KR;
Samsung Electronics Co., Ltd., Suwon-Si, KR;
Abstract
A method of fabricating a semiconductor device including sequentially forming a polysilicon layer, a first insulating layer, and a photoresist layer over a gate oxide film positioned on a semiconductor substrate. A photoresist pattern with a first groove is formed by selectively patterning the photoresist layer to partially expose a surface of the first insulating layer. A second insulating layer is formed over the photoresist pattern with the first groove and over the exposed surface of the first insulating layer. A sacrificial spacer is formed on each inner wall of the first groove by etching back the second insulating layer and forming a second groove in the first insulating layer in communication with the first groove to expose a surface of the polysilicon layer at the bottom of the second groove. The photoresist pattern is removed, and an arbitrary layer pattern is formed over the polysilicon layer at the bottom of the second groove. The sacrificial spacers and first insulating layer are removed, and a gate electrode is formed by etching the polysilicon layer using the arbitrary layer pattern as a mask.