The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2006
Filed:
Sep. 26, 2003
Fumitaka Nakayama, Higashikurume, JP;
Masatoshi Morikawa, Hanno, JP;
Yutaka Hoshino, Akishima, JP;
Tetsuo Uchiyama, Maebashi, JP;
Fumitaka Nakayama, Higashikurume, JP;
Masatoshi Morikawa, Hanno, JP;
Yutaka Hoshino, Akishima, JP;
Tetsuo Uchiyama, Maebashi, JP;
Renesas Technology Corp., Tokyo, JP;
Renesas Eastern Japan Semiconductor, Inc., Tokyo, JP;
Abstract
Plural elements forming a high frequency device in one chip are provided by forming a resistor element and the lower electrode of a capacitor element from one identical polycrystal silicon film over a substrate; forming the gate electrode of a power MISFET, upper electrode of the capacitor element, gate electrode of an n-channel type MISFET and gate electrode of a p-channel type MISFET from an identical polycrystal silicon film different from the other polycrystal silicon film and a WSi film; forming a capacitor element having a wiring formed on a silicon oxide film deposited over the substrate as a lower electrode and a wiring formed on the silicon oxide film as the upper electrode in the region MIN; forming a spiral coil in a region IND using an aluminum alloy film identical with that deposited on a silicon oxide film; and forming a bonding pad in a region PAD.