Semiconductor integrated circuitry and method for manufacturing the circuitry

Abstract

A technology for a semiconductor integrated circuitry allows each of the DRAM memory cells to be divided finely so as to be more highly integrated and operate faster. In a method of manufacturing such a semiconductor integrated circuit, at first, gate electrodesare formed via a gate insulating filmon the main surface of a semiconductor substrate, and on side surfaces of each of the gate electrodes there is formed a first side wall spacercomposed of silicon nitride and a second side wall spacercomposed of silicon oxide. Then, in the selecting MISFET Qs in the DRAM memory cell area there are opened connecting holesandin a self-matching manner with respect to the first side wall spacersand connecting portion is formed connecting a conductorto a bit line BL. In addition, in the N channel MISFETs Qnand Qn, and in the P channel MISFET Qpin areas other than the DRAM memory cell area, high density N-type semiconductor areasandare formed, as well as a high density P-type semiconductor areais formed in a self-matching manner with respect to the second side wall spacers