The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2006

Filed:

Jun. 06, 2002
Applicants:

Saurabh Dutta Chowdhury, Belmont, CA (US);

Mehran Sedigh, Campbell, CA (US);

Chan Lon Yang, Los Gatos, CA (US);

Prabhu Goplana, Fremont, CA (US);

Inventors:

Saurabh Dutta Chowdhury, Belmont, CA (US);

Mehran Sedigh, Campbell, CA (US);

Chan Lon Yang, Los Gatos, CA (US);

Prabhu Goplana, Fremont, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one embodiment, a method () may include forming a first insulating layer over a semiconductor substrate (step), forming a hard mask layer (step), and forming a photoresist etch mask having a thickness of less than about 4,000 angstroms (step). Such a reduced thickness may conventionally lead to uncontrolled etching and/or may require multiple steps to ensure feature formation. A method () may further include etching an opening through at least one half the thickness of the hard mask layer to form a hard mask (step) and etching through a first insulating layer without first removing a photoresist layer (step). Such etching can essentially consume a photoresist layer, however controllability can be maintained as etching may continue with a hard mask in place.


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