The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2006
Filed:
Dec. 05, 2003
Setho Sing Fee, Singapore, SG;
Lim Thiam Chye, Singapore, SG;
Setho Sing Fee, Singapore, SG;
Lim Thiam Chye, Singapore, SG;
Micron Technology, Inc., Boise, ID (US);
Abstract
A quad flat no-lead (QFN) grid array semiconductor package and method for making the same is disclosed. The package includes a semiconductor die and a lead frame having a plurality of conductive elements patterned in a grid-type array. A plurality of bond pads on the semiconductor die is coupled to the plurality of conductive elements, such as by wire bonding. The semiconductor die and at least a portion of the lead frame are encapsulated in an insulative material, leaving the conductive elements exposed along a bottom major surface of the package for subsequent electrical connection with higher-level packaging. Individual conductive lead elements, as well as the grid array pattern, are formed by wire bonding multiple bond pads to a single lead at different locations and subsequently severing the leads between the bonding locations to form multiple conductive elements from each individual lead.