The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2006
Filed:
Mar. 23, 2004
Stephen E. J. Papa, Santa Cruz, CA (US);
Carlton G. Amdahl, Fremont, CA (US);
Michael G. Henderson, San Jose, CA (US);
Don Agneta, Morgan Hill, CA (US);
Don Schiro, San Jose, CA (US);
Dennis H. Smith, Fremont, CA (US);
Stephen E. J. Papa, Santa Cruz, CA (US);
Carlton G. Amdahl, Fremont, CA (US);
Michael G. Henderson, San Jose, CA (US);
Don Agneta, Morgan Hill, CA (US);
Don Schiro, San Jose, CA (US);
Dennis H. Smith, Fremont, CA (US);
Micron Technology, Inc., Boise, ID (US);
Abstract
A method of electrically coupling a central processing unit (CPU) of a network server to a plurality of network interface modules. The method comprises providing each of the plurality of network interface modules with a respective bus adapter chip to route an I/O bus having a first format from the central processing unit to a primary side of each of the plurality of bus adaptor chips and routing another I/O bus of the first format from a secondary side of each of the plurality of bus adapter chips to respective ones of the network interface modules. The bus adapter chips also provide for arbitered access along the I/O buses and isolation of the CPU from electrical disruption when one the network interface modules is removed.