The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2006
Filed:
Jan. 05, 2004
Kai-chi Chen, Nantou County, TW;
Shu-chen Huang, Keelung, TW;
Hsun-tien LI, Hsinchu, TW;
Tzong-ming Lee, Hsinchu, TW;
Taro Fukui, Osaka, JP;
Tomoaki Nemoto, Osaka, JP;
Kai-Chi Chen, Nantou County, TW;
Shu-Chen Huang, Keelung, TW;
Hsun-Tien Li, Hsinchu, TW;
Tzong-Ming Lee, Hsinchu, TW;
Taro Fukui, Osaka, JP;
Tomoaki Nemoto, Osaka, JP;
Industrial Technology Research Institute, Hsinchu, TW;
Matsushita Electric Works, Ltd., Osaka, JP;
Abstract
A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is bonded and electrically connected to the carrier or another chip using a flip-chip bonding technique. A flip-chip bonding gap is set up between the chip and he carrier or other chips. The heat sink is set up over the top chip. The heat sink has an area bigger than the chip. The encapsulating material layer fills up the flip-chip bonding gap and covers the carrier as well as the heat sink. The encapsulating material layer is formed in a simultaneous molding process and has a thermal conductivity more than 1.2 W/m.K. Furthermore, a plurality of standoff components may be selectively positioned on the heat sink.