Calibration standard for critical dimension verification of sub-tenth micron integrated circuit technology

Abstract

A critical dimension control wafer for calibrating process control scanning electron microscopes is described. The test wafer provides one or more test structures each consisting of an array of parallel trenches precision micro-machined in a metal plate. The trenches are formed, preferably in an aluminum/copper alloy plate, using focused ion beam milling. The micro-machined trenches have lower width roughness and lower edge roughness compared to similar patterns form in polysilicon by conventional photo lithographic methods. In addition, electron charging in the scanning electron microscope, which produces distorted images, is essentially eliminated. The dimensions of the trenches and the metal lines between them have dimensions comparable to those of polysilicon lines used in sub-tenth micron integrated circuit process technology control wafer. The control wafers are calibrated using a calibrated laboratory grade scanning electron microscope. Once calibrated, the control wafers may be stock-piled for subsequent routine use as a high precision dimensional reference, in particular for calibrating and monitoring the stability of process line scanning electron microscopes.