The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2006
Filed:
Apr. 15, 2004
Applicants:
Michael J. Walk, Mesa, AZ (US);
Hamid Azimi, Chandler, AZ (US);
John S. Guzek, Chandler, AZ (US);
Charan K. Gurumurthy, Chandler, AZ (US);
Inventors:
Michael J. Walk, Mesa, AZ (US);
Hamid Azimi, Chandler, AZ (US);
John S. Guzek, Chandler, AZ (US);
Charan K. Gurumurthy, Chandler, AZ (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01);
U.S. Cl.
CPC ...
Abstract
A system may include a coreless substrate, a layer of material attached to the substrate, the layer of material having a lower elastic modulus than the substrate, an interposer coupled to the layer of material, and a capacitive layer coupled to the interposer.
Walk, Michael. (2006). Integrated circuit package with low modulus layer and capacitor/interposer (U.S. Patent No. 7042077). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7042077
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile