The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2006

Filed:

Apr. 28, 2003
Applicants:

R. Dean Adams, St. George, VT (US);

Thomas J. Eckenrode, Endicott, NY (US);

Steven L. Gregor, Endicott, NY (US);

Kamran Zarrineh, Vescal, NY (US);

Inventors:

R. Dean Adams, St. George, VT (US);

Thomas J. Eckenrode, Endicott, NY (US);

Steven L. Gregor, Endicott, NY (US);

Kamran Zarrineh, Vescal, NY (US);

Assignee:

Cadence Design Systems Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for testing multiported memories, especially when one or more of the ports are not directly accessible without intervening logic. The method and system segregates the multiported memory into at least two portions which are then used for testing the one or more ports which are not directly accessible.


Find Patent Forward Citations

Adams, R.. (2006). Method and apparatus for testing multi-port memories (U.S. Patent No. 7032144). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7032144

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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