The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2006
Filed:
Jul. 31, 2003
In-ku Kang, Chungchcongnam-do, KR;
Hee-kook Choi, Chungcheongnam-do, KR;
Sang-ho an, Kyunggi-do, KR;
Sang-yeop Lee, Chungcheongnam-do, KR;
In-Ku Kang, Chungchcongnam-do, KR;
Hee-Kook Choi, Chungcheongnam-do, KR;
Sang-Ho An, Kyunggi-do, KR;
Sang-Yeop Lee, Chungcheongnam-do, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
Provided herein are multi-chip modules (MCMs) having bonding wires and fabrication methods thereof. The multi-chip module includes a substrate and a plurality of chips sequentially stacked. At least one top chip, stacked above a lowest chip, has an insulating film that covers the backside thereof. Also, each of the stacked chips has bonding pads formed on the periphery or edges of its upper surface. At least one insulator is interposed between the stacked chips. The insulator exposes the pads on the underlying chip. The pads of the respective chips are connected to a set of interconnections, which are disposed on the substrate. This configuration of stacked chips enables the overall height of the memory module to be reduced because the insulating film prevents the bonding wires from contacting the substrate of the top chips.