The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2006

Filed:

Nov. 20, 2002
Applicants:

John P. Barnak, Banks, OR (US);

Robert S. Chau, Beaverton, OR (US);

Chunlin Liang, San Jose, CA (US);

Inventors:

John P. Barnak, Banks, OR (US);

Robert S. Chau, Beaverton, OR (US);

Chunlin Liang, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An insulated gate field effect transistor (FET) of a particular conductivity type, has as a gate electrode, a non-semiconductive material with a work function that approximates the work function of a semiconductive material that is doped to be of the same conductivity type. In a particular embodiment, an integrated circuit includes an n-channel FET having a tantalum-based gate electrode with a work function approximately the same as n-doped polysilicon, and a p-channel FET has a tantalum nitride-based gate electrode with a work function approximately the same as p-doped polysilicon.


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