The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2006
Filed:
Oct. 09, 2003
Jia Zhen Zheng, Singapore, SG;
Pradeep Ramachandramurthy Yelehanka, Singapore, SG;
Weining LI, Shanghai, CN;
Jia Zhen Zheng, Singapore, SG;
Pradeep Ramachandramurthy Yelehanka, Singapore, SG;
Weining Li, Shanghai, CN;
Chartered Semiconductor Manufacturing Ltd., Singapore, SG;
Abstract
A method for manufacturing an integrated circuit structure includes providing a semiconductor substrate and forming a gate dielectric layer over the semiconductor substrate. The gate dielectric layer is formed in a plurality of thicknesses in a plurality of devices regions over the semiconductor substrate. A second dielectric layer is formed over at least one of the devices regions. A third dielectric layer is formed over at least a portion of the second dielectric layer. Ion traps are then selectively implanted in portions of the second dielectric layer.