The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2006
Filed:
Dec. 29, 2003
Daniel C. Diana, Portland, OR (US);
Ebrahim Andideh, Portland, OR (US);
Richard M. Steger, Beaverton, OR (US);
Valery Dubin, Portland, OR (US);
Ming Fang, Portland, OR (US);
Daniel C. Diana, Portland, OR (US);
Ebrahim Andideh, Portland, OR (US);
Richard M. Steger, Beaverton, OR (US);
Valery Dubin, Portland, OR (US);
Ming Fang, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Some embodiments for a method to fill interlayer vias with a suitable metal in a ferroelectric polymer memory die to reduce the step height and improve the thermal and electrical properties of the via. The method uses an electroless plating method to fill the vias, which is compatible with the ferroelectric polymer memory die processing temperature limits. The resulting process produces via fill metal plugs in the ferroelectric memory die, which allows for the deposition of a thin metal layer over the vias, while at the same time improving the electrical and thermal properties of the vias. Other embodiments are described and claimed herein.