The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2006

Filed:

Apr. 05, 2002
Applicants:

Rohit Kapur, Cupertino, CA (US);

Thomas W. Williams, Boulder, CO (US);

Tony Taylor, Mountain View, CA (US);

Peter Wohl, Williston, VT (US);

John A. Waicukauski, Tualatin, OR (US);

Inventors:

Rohit Kapur, Cupertino, CA (US);

Thomas W. Williams, Boulder, CO (US);

Tony Taylor, Mountain View, CA (US);

Peter Wohl, Williston, VT (US);

John A. Waicukauski, Tualatin, OR (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

A filter for preventing uncertain bits output by test scan chains from being provided to a MISR is provided. The filter can include a gating structure for receiving a bit from a scan chain and control circuitry for providing a predetermined signal to the gating structure if the bit is an uncertain bit. In one embodiment, the gating structure can include a logic gate, such as an AND or an OR gate. The control circuitry can include components substantially similar to the pattern generator providing signals to the scan chain. For example, the control circuitry can include an LFSR and a PRPG shadow for loading the LFSR. In one embodiment, the control circuitry can further include a phase-shifter for receiving inputs from the LFSR and providing outputs to the gating structure.


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