The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6984545 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 10, 2006

Filed:

Jul. 22, 2002
Applicants:

Ford B. Grigg, Meridian, ID (US);

William J. Reeder, Boise, ID (US);

Inventors:

Ford B. Grigg, Meridian, ID (US);

William J. Reeder, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A solder mask includes an opening through which intermediate conductive elements may be positioned between bond pads of a semiconductor die exposed through an aligned opening in a carrier substrate to which the solder mask is secured and corresponding contact areas of the carrier substrate. An assembly is formed by forming the solder mask on or securing the solder mask to the carrier substrate. The semiconductor die is then attached to the carrier substrate such that bond pads of the semiconductor die are exposed through the aligned openings in the carrier substrate and solder mask. Intermediate conductive elements are then used to electrically connect the bond pads to corresponding contact areas on the carrier substrate. An encapsulant material is introduced into an area defined by the solder mask and carrier substrate openings such that the intermediate conductive elements and semiconductor die surface within the aligned openings are encapsulated.


Find Patent Forward Citations

Grigg, Ford. (2006). Methods of encapsulating selected locations of a semiconductor die assembly using a thick solder mask (U.S. Patent No. 6984545). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6984545

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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