The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 03, 2006
Filed:
Jul. 26, 2004
Franz Hofmann, Munich, DE;
Erhard Landgraf, Munich, DE;
Hannes Luyken, Munich, DE;
Infineon Technologies AG, Munich, DE;
Abstract
Method of fabricating a memory cell, in which a storage layer, which is designed for programming by charge carrier trapping, and a gate electrode, which is electrically insulated from a semiconductor material, are fabricated at a top side of a semiconductor body or a semiconductor layer structure above a channel region provided between doped source-drain regions. The method includes the steps of fabricating at least one trench in the top side, providing at least portions of the trench walls which adjoin the source-drain regions to be fabricated with the storage layer, depositing a material provided for the gate electrode into the trench, forming the source-drain regions by covering the gate electrode, removing, on both sides of the trench, the semiconductor material down to an intended depth, and implanting dopant, and applying an insulation layer to the source-drain region, and fabricating an electrical connection for the gate electrode.