The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2005

Filed:

Aug. 06, 2003
Applicants:

Heiko Hommen, Dresden, DE;

Ralf Otto, Kesselsdorf, DE;

Thorsten Schedel, Dresden, DE;

Sebastian Schmidt, Dresden, DE;

Thomas Fischer, Dresden, DE;

Inventors:

Heiko Hommen, Dresden, DE;

Ralf Otto, Kesselsdorf, DE;

Thorsten Schedel, Dresden, DE;

Sebastian Schmidt, Dresden, DE;

Thomas Fischer, Dresden, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G03F009/00 ; G03C005/00 ;
U.S. Cl.
CPC ...
Abstract

A batch of semiconductor wafers are exposed after an alignment in a wafer stepper or scanner and each of their alignment parameters are determined. Using, e.g., a linear formula with tool specific coefficients, the overlay accuracy can be calculated from these alignment parameters in advance with a high degree of accuracy as if a measurement with an overlay inspection tool had been performed. The exposure tool-offset can be adjusted on a wafer-to-wafer basis to correct for the derived overlay inaccuracy. Moreover, the alignment parameters for a specific wafer can be used to change the tool-offset for the same wafer prior to exposure. The required inspection tool capacity is advantageously reduced, the wafer rework decreases, and time is saved to perform the exposure step.


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