The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2005
Filed:
Jun. 24, 2003
Applicants:
Tak M. Mak, Union City, CA (US);
Victor W. Lee, San Jose, CA (US);
Inventors:
Tak M. Mak, Union City, CA (US);
Victor W. Lee, San Jose, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F011/26 ;
U.S. Cl.
CPC ...
Abstract
A method of testing a DUT is provided. The method comprises loading a memory within a link-based system with a functional test program, executing the functional test program in a processor core of the link-based system, and routing test signals generated during execution of the functional test program to a response agent embedded in the link-based system via an external path.
Mak, Tak. (2005). Functional testing of logic circuits that use high-speed links (U.S. Patent No. 6975954). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6975954
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile