The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2005
Filed:
Feb. 03, 2003
Qwai H. Low, Cupertino, CA (US);
Chok J. Chia, Cupertino, CA (US);
Ramaswamy Ranganathan, Saratoga, CA (US);
Tauman T. Lau, San Jose, CA (US);
Qwai H. Low, Cupertino, CA (US);
Chok J. Chia, Cupertino, CA (US);
Ramaswamy Ranganathan, Saratoga, CA (US);
Tauman T. Lau, San Jose, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
An integrated circuit with a pressure resistant current carrying structure having electrically conductive layers for carrying current. A first electrically nonconductive material at least partially surrounds the electrically conductive layers, and provides electrical insulation between the electrically conductive layers. The first electrically nonconductive material has a first degree of fragility and a first dielectric constant. A second electrically nonconductive material is disposed in a pattern within the first electrically nonconductive material and between the electrically conductive layers, and provides structural support for the first electrically nonconductive material between the electrically conductive layers. The second electrically nonconductive material has a second degree of fragility that is less than the first degree of fragility and a second dielectric constant that is greater than the first dielectric constant.