The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2005
Filed:
Jun. 18, 2003
Thomas Evans, LaPorte, CO (US);
Stan Mihelcic, Pleasanton, CA (US);
Leah M. Miller, Fremont, CA (US);
Kumar Nagarajan, San Jose, CA (US);
Edwin M. Fulcher, Palo Alto, CA (US);
Thomas Evans, LaPorte, CO (US);
Stan Mihelcic, Pleasanton, CA (US);
Leah M. Miller, Fremont, CA (US);
Kumar Nagarajan, San Jose, CA (US);
Edwin M. Fulcher, Palo Alto, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A system and method are provided for forming a multi-chip package. The multi-chip package includes a multi-layer substrate and a heat spreader of single, unibody construction. At least two integrated circuits are coupled between the multi-layer substrate and the heat spreader. The integrated circuits are spaced from one another to allow airflow between those circuits and a portion of the underside surface of the heat spreader. Depending on the layout of the package, a passive device can also be placed in the space between integrated circuits. The passive device extends upward a spaced distance from the underneath surface of the heat spreader so as not to block the airflow therebetween. The multi-chip package can accommodate integrated circuits that are either all packaged, all unpackaged, or a combination of each. If packaged and unpackaged integrated circuits are placed on the multi-layer substrate, the heat spreader can extend in two separate planes to accommodate the different thicknesses of those packaged and unpackaged integrated circuits. Alternatively, a second heat spreader can be placed on a relatively thin integrated circuit so that the upper surface of the second heat spreader is coplanar with an upper surface of a relatively thick integrated circuit. This will allow a planar heat spreader to be arranged across the thick integrated circuit and the second heat spreader. In all instances, however, the heat spreader extends as a single, contiguous unibody element across the entire multi-chip package.