The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2005

Filed:

Jun. 14, 2004
Applicants:

Mahalingam Nandakumar, Richardson, TX (US);

Karthik Vasanth, Dallas, TX (US);

Ih-chin Chen, Richardson, TX (US);

Inventors:

Mahalingam Nandakumar, Richardson, TX (US);

Karthik Vasanth, Dallas, TX (US);

Ih-Chin Chen, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/336 ;
U.S. Cl.
CPC ...
Abstract

A field effect transistor with a dual-counterdoped channel is disclosed. The transistor features a channel comprising a first doped region () and a second doped region () underlying the first doped region. A source and drain () are formed adjacent to the channel. In one embodiment of the present invention, the first doped region () is doped with arsenic, while the second doped region () is doped with phosphorus. The high charge-carrier mobility of the subsurface channel layer () allowing a lower channel dopant concentration to be used, which in turn allows lower source/drain pocket doping. This reduces the capacitance and response time of the transistor.


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