The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2005

Filed:

Feb. 06, 2003
Applicants:

Chul-sung Park, Seoul, KR;

Hyang-ja Yang, Kyuggi-do, KR;

Seung-min Lee, Suwon-shi, KR;

Yong-hwan Noh, Suwon-shi, KR;

Inventors:

Chul-Sung Park, Seoul, KR;

Hyang-Ja Yang, Kyuggi-do, KR;

Seung-Min Lee, Suwon-shi, KR;

Yong-Hwan Noh, Suwon-shi, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C005/14 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device which includes an internal voltage generator circuit for adjusting an external power supply voltage and generating first and second internal power supply voltages. The first internal power supply voltage is supplied to a memory cell array via a first power supply line, and the second internal power supply voltage is supplied to a peripheral circuit via a second power supply line. A control circuit controls the internal voltage generator circuit so that the levels of the first and second internal power supply voltages vary depending on a mode of operation.


Find Patent Forward Citations

Park, Chul-Sung. (2005). Semiconductor memory device with internal voltage generators for testing a memory array and peripheral circuits (U.S. Patent No. 6958947). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6958947

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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