The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2005
Filed:
Jun. 17, 2003
Applicants:
Masaru Sugimoto, Hyogo, JP;
Teruhiko Funakura, Hyogo, JP;
Hidekazu Nagasawa, Hyogo, JP;
Inventors:
Assignee:
Renesas Technology Corp., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R031/26 ;
U.S. Cl.
CPC ...
Abstract
The interface circuit includes n buffer circuits, switches for connecting an external pin of a tester to input nodes of n buffer circuits and connecting output nodes of n buffers respectively to n DUTs when a signal is provided from the tester to n DUTs, and successively connecting n DUTs to the external pin of the tester by a prescribed time period when voltage-ampere characteristics of n DUTs are measured. Therefore the number of devices that can be measured by the tester at a time can be increased by n times. As a result, the test cost can be reduced and the test accuracy can be improved.