The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2005
Filed:
Apr. 18, 2002
Tetsuya Hayashida, Hinode, JP;
Tetsuya Hayashida, Hinode, JP;
Renesas Technology Corp., Tokyo, JP;
Renesas Northern Japan Semiconductor, Inc., Hokkaido, JP;
Abstract
A semiconductor device having area array bump electrodes suitable for flip chip packaging is disclosed. A semiconductor chip with wire bonding electrodes arranged along peripheral edges thereof is provided, then gold wire bump electrodes are formed over the wire bonding electrodes, and thereafter a wiring tape substrate is superimposed on the semiconductor chip and is bonded thereto with an adhesive. On a back surface of the wiring tape substrate are formed wiring connections correspondingly to the electrodes. Further, at the time of bonding with use of the adhesive, convex tips of the gold wire bump electrodes formed respectively on the electrodes of the semiconductor chip pierce through the adhesive to connect the gold wire bump electrodes and the connections electrically with each other. On a surface of the wiring tape substrate are formed area array bump electrodes, whose pitch is larger than the pitch of the electrodes formed on the semiconductor chip.