The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2005

Filed:

Mar. 04, 2002
Applicants:

Shigeru Nakamura, Ayase, JP;

Masakatsu Gotou, Atsugi, JP;

Inventors:

Shigeru Nakamura, Ayase, JP;

Masakatsu Gotou, Atsugi, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/44 ; H01L021/48 ; H01L021/50 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor device having a stack structure comprises: a single-piece substrate having a chip support surface serving as a main surface, a back surface, a plurality of connection terminals provided on the chip support surface and a plurality of solder balls provided on the back surface; a first semiconductor chip having a main surface, aback surface, a plurality of semiconductor devices on the main surface of the first semiconductor chip and a plurality of pads provided on the main surface of the first semiconductor chip; a second semiconductor chip having a main surface, a back surface, a plurality of semiconductor devices provided on the main surface of the second semiconductor chip and a plurality of pads provided on the main surface of the second semiconductor chip; and a resin sealing body formed on the chip support surface of the single-piece substrate and used for sealing the first semiconductor chip and the second semiconductor chip; and a plurality of wires for connecting the pads of the second semiconductor chip to the respective connection terminals provided on the single-piece substrate. In the stack structure, the second semiconductor chip is made thinner than the first semiconductor chip. As a result, the structure package of the semiconductor device can be made thin.


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