The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2005
Filed:
May. 12, 2003
Troy W. Barbee, Iii, Sunnyvale, CA (US);
William Clark Naylor, Jr., San Jose, CA (US);
Ross Alexander Donelly, Sunnyvale, CA (US);
Troy W. Barbee, III, Sunnyvale, CA (US);
William Clark Naylor, Jr., San Jose, CA (US);
Ross Alexander Donelly, Sunnyvale, CA (US);
Synopsys, Inc, Mountain View, CA (US);
Abstract
A method and system of placing cells of an IC design using partition preconditioning. In one embodiment, cells of an integrated circuit design are grouped to model curvature of an objective function. The grouping produce a plurality of cell clusters. The model formed may be a binary tree. The curvature of the objective function for each of the cell clusters is estimated. Interactions between said cell clusters are described as a relation. A set of preconditioning values which achieves a separation of variables of the relation is determined. The preconditioning may be applied to a conjugate gradient placement process to advantageously decrease the number of iterations required to produce an optimized placement of the cells.