The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2005
Filed:
Dec. 18, 2001
Surya Battacharya, Irvine, CA (US);
Ming Chen, Mission Viejo, CA (US);
Guang-jye Shiau, Irvine, CA (US);
Liming Tsau, Irvine, CA (US);
Henry Chen, Irvine, CA (US);
Surya Battacharya, Irvine, CA (US);
Ming Chen, Mission Viejo, CA (US);
Guang-Jye Shiau, Irvine, CA (US);
Liming Tsau, Irvine, CA (US);
Henry Chen, Irvine, CA (US);
Broadcom Corporation, Irvine, CA (US);
Abstract
A method for testing a semiconductor wafer. An array of probes is coupled to the semiconductor wafer. Then a voltage difference is applied across a plurality of adjacent metal line pairs (e.g., wordline and/or bitline pairs) of one or more SRAM arrays of at least one die. Application of the voltage difference induces failure of metal stringers or defects between the adjacent lines. Additionally, the voltage can be applied across respective pairs of substantially all parallel metal lines of the one or more SRAM arrays of more that one die of the semiconductor wafer.