The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2005
Filed:
Aug. 21, 2002
Amit P. Marathe, Milpitas, CA (US);
Pin-chin Connie Wang, Menlo Park, CA (US);
Christy Mei-chu Woo, Cupertino, CA (US);
Amit P. Marathe, Milpitas, CA (US);
Pin-Chin Connie Wang, Menlo Park, CA (US);
Christy Mei-Chu Woo, Cupertino, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate. A first dielectric layer on the device dielectric layer has an opening formed therein including a conductor reservoir volume. A barrier layer lines the channel opening. A conductor core fills the opening over the barrier layer. A second dielectric layer is formed on the first dielectric layer and has a second channel and via opening provided therein. A barrier layer lines the second channel and via opening except over the first channel opening. A conductor core fills the second channel and via opening over the barrier layer and the first conductor core to form the second channel and via. The conductor reservoir volume provides a supply of conductor material to prevent the formation of voids in the first channel and in the via.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile