The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2005

Filed:

Jul. 01, 2003
Applicants:

Hirofumi Fujioka, Tokyo, JP;

Kenichi Koyanagi, Tokyo, JP;

Hiroyuki Kitamura, Tokyo, JP;

Inventors:

Hirofumi Fujioka, Tokyo, JP;

Kenichi Koyanagi, Tokyo, JP;

Hiroyuki Kitamura, Tokyo, JP;

Assignee:

Elpida Memory, Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/205 ;
U.S. Cl.
CPC ...
Abstract

There is provided a method for manufacturing a semiconductor device including a capacitor having a lower electrode, an upper electrode and a capacitive insulating film between the lower electrode and the upper electrode on a semiconductor substrate, wherein the capacitive insulating film is formed on the lower electrode over the semiconductor substrate using a chemical vapor deposition method, the method including: a lower electrode forming step of forming the lower electrode on the semiconductor, a dual-stage deposition step including a first stage for introducing a material gas containing a specified metal into a reactor in which the semiconductor substrate is placed and a second stage for subsequently introducing an oxidizing gas into the reactor, and wherein a metal oxide film as an oxide of the specified metal is formed on the lower electrode over the semiconductor substrate, by repeating the dual-stage deposition step two or more times, thereby forming the capacitive insulating film; and an upper electrode forming step of forming the upper electrode on the capacitive insulating film. Thus, it is possible to obtain the capacitive insulating film having good step coverage and a good film quality, without reducing throughput.


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