The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2005

Filed:

Aug. 31, 2004
Applicant:

Burnell G. West, Half Moon Bay, CA (US);

Inventor:

Burnell G. West, Half Moon Bay, CA (US);

Assignee:

Credence Systems Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R031/26 ;
U.S. Cl.
CPC ...
Abstract

A pin electronics circuit for use in automatic test equipment may include a reconfigurable logic device in which different logic configurations may be installed to make measurements according to multiple tests to be applied to a device under test; a level generating circuit coupled to the reconfigurable logic device, and configured to generate a number of test levels and a number of reference levels; and a switching circuit, coupled to the reconfigurable logic device and the level generating circuit, configured to receive the test levels and the reference levels, and controlled by the reconfigurable logic device to selectively apply the test levels to the device under test according to a selected test and to sense levels inputted to or outputted from the device under test by comparing the reference levels generated by the level generating circuit to the levels inputted to our outputted from the device under test.


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