The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2005

Filed:

Oct. 29, 2002
Applicants:

Atsushi Ono, Yamatokoriyama, JP;

Yasunori Chikawa, Kitakatsuragi-gun, JP;

Makoto Kanda, Kashihara, JP;

Norimitsu Nie, Kashiba, JP;

Satoru Tone, Nara, JP;

Motoji Shiota, Kashihara, JP;

Akio Inohara, Shijinawate, JP;

Hirokazu Yoshida, Osaka, JP;

Inventors:

Atsushi Ono, Yamatokoriyama, JP;

Yasunori Chikawa, Kitakatsuragi-gun, JP;

Makoto Kanda, Kashihara, JP;

Norimitsu Nie, Kashiba, JP;

Satoru Tone, Nara, JP;

Motoji Shiota, Kashihara, JP;

Akio Inohara, Shijinawate, JP;

Hirokazu Yoshida, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L023/48 ; H01L023/52 ; H01L029/40 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.


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