The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2005

Filed:

Sep. 11, 2002
Applicants:

Yu-ting Lai, Taichung, TW;

Ken-hung Kuo, Taichung, TW;

Shy-hwa Feng, Taichung, TW;

Inventors:

Yu-Ting Lai, Taichung, TW;

Ken-Hung Kuo, Taichung, TW;

Shy-Hwa Feng, Taichung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L023/02 ; H01L023/48 ; H01L023/52 ; H01L023/053 ;
U.S. Cl.
CPC ...
Abstract

A substrate for a semiconductor package is provided, which includes: a core layer; at least a metal layer applied over each of upper and lower surfaces of the core layer, wherein the metal layer on the upper surface forms a plurality of conductive traces each having a terminal, and the metal layer on the lower surface is defined with a conductive region and a surrounding peripheral region, allowing the conductive region to form a plurality of conductive traces each having a terminal; and an insulating layer applied over each of the metal layers, wherein terminals of the conductive traces and at least a corner portion of the peripheral region are exposed to outside of the insulating layers. During fabrication of semiconductor packages, after a post molding curing process, the vertically-stacked substrates can be easily separated by virtue of a gap being formed between exposed corner portions of the stacked substrates.


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