The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2005

Filed:

Sep. 25, 2001
Applicants:

Gregory G. Freeman, Hopewell Junction, NY (US);

Seshadri Subbanna, Brewster, NY (US);

Basanth Jagannathan, Beacon, NY (US);

Kathryn T. Schonenberg, Fairfield, CT (US);

Shwu-jen Jeng, Wappingers Fall, NY (US);

Kenneth J. Stein, Sandy Hook, CT (US);

Jeffrey B. Johnson, Essex Junction, VT (US);

Inventors:

Gregory G. Freeman, Hopewell Junction, NY (US);

Seshadri Subbanna, Brewster, NY (US);

Basanth Jagannathan, Beacon, NY (US);

Kathryn T. Schonenberg, Fairfield, CT (US);

Shwu-Jen Jeng, Wappingers Fall, NY (US);

Kenneth J. Stein, Sandy Hook, CT (US);

Jeffrey B. Johnson, Essex Junction, VT (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L027/082 ; H01L027/102 ; H01L029/70 ; H01L031/11 ;
U.S. Cl.
CPC ...
Abstract

A raised extrinsic base, silicon germanium (SiGe) heterojunction bipolar transistor (HBT), and a method of making the same is disclosed herein. The heterojunction bipolar transistor includes a substrate, a silicon germanium layer formed on the substrate, a collector layer formed on the substrate, a raised extrinsic base layer formed on the silicon germanium layer, and an emitter layer formed on the silicon germanium layer. The silicon germanium layer forms a heterojunction between the emitter layer and the raised extrinsic base layer. The bipolar transistor further includes a base electrode formed on a portion of the raised extrinsic base layer, a collector electrode formed on a portion of the collector layer, and an emitter electrode formed on a portion of the emitter layer. Thus, the heterojunction bipolar transistor includes a self-aligned raised extrinsic base, a minimal junction depth, and minimal interstitial defects influencing the base width, all being formed with minimal thermal processing. The heterojunction bipolar transistor simultaneously improves three factors that affect the speed and performance of bipolar transistors: base width, base resistance, and base-collector capacitance.


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