The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2005

Filed:

Nov. 14, 2002
Applicant:

Rochit Rajsuman, Santa Clara, CA (US);

Inventor:

Rochit Rajsuman, Santa Clara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R031/28 ;
U.S. Cl.
CPC ...
Abstract

A method for applying test vectors to a device under test (DUT) at a speed of the DUT is disclosed. A pattern memory is re-organized into m modules, where m is a DUT/pattern memory speed ratio. Delay circuits in address lines of each module are programmed such that an address signal for a qth module is delayed by (q−1) delay units, where each delay unit is equivalent to one DUT clock cycle. Patterns for each test are stored in these modules according to [n mod m]; where n is a number of patterns in a test. Identical addresses are simultaneously applied to the delay circuits of the m modules according to a fixed address sequence at a rate f equal to or slower than the operating frequency of the pattern memory, such that a period of f is equal to or greater than (m−1) delay units.


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